Interconnection technology is an important aspect of the fabrication of electronic components containing semiconductor devices. For example, in chip bonding, the back of a chip is mechanically attached to an appropriate medium, such as a ceramic substrate, a paddle of a metal lead frame or to a ball grid array (BGA). The upper level of wiring for the chip normally includes bond pads which are electrically attached, via the necessary connections, to the underlying circuit. The chip commonly has a protective overcoat (PO) layer, generally referred to as passivation, with holes providing access to the bond pads. The bond pads on the circuit side of the chip are electrically connected to the package leads by wires or other electrical conductors to permit utilization of the integrated circuit (IC). The type of interconnection scheme which is used can vary widely, depending on the desired characteristics of the packaging involved. For example, thin wires are typically used as part of the interconnection, and these may be ultrasonically bonded to the bond pad (sometimes referred to herein as “wire bonding”) or by the formation of solder balls which make a direct connection between the bond pad on the chip and a substrate (as in the flip chip process). Other common methods for making IC interconnections, such as connecting the bond pads to the leads of the lead frame, or the conductors of other conductor support devices, include Tape Automated Bonding (TAB), Controlled Collapse Chip Connection (C4) or bump bonding, and through the use of conductive adhesives.
Aluminum has heretofore frequently been the material of choice for use in the formation of the interconnect elements, such as the metal traces of the semiconductor circuit, the bond pads and (for large pitch applications) wires. However, the desirability of using aluminum has recently been affected by the pressure in the IC industry to reduce the cost and size of IC devices and to increase the input/output capacity and speed of such devices. This pressure has increased the need for finer traces on the semiconductor and finer pitch interconnections, which frequently require thinner and sometimes longer wires. As a result, some of the deficiencies of aluminum and its alloys, such as relatively high resistance to current flow, reliability and electromigration have sparked a need for more reliable, and higher conductivity metals for use in the IC circuitry. Fine-pitch interconnections between semiconductor devices and a supporting substrate, such as a leadframe or BGA, are usually made using thin gold wires. The high cost of gold and the combination of higher speed and thinner wires have also created a need for a higher conductivity and lower cost metal for fine-pitch wire bonding.
To address these issues, a metal that has received increased attention is copper. While copper has a significantly lower resistivity than aluminum or gold, its use in interconnect devices posses a set of problems that are not present with the use of aluminum or gold. For example, the formation of an interconnect to copper bond pads will generally require that the copper is exposed to ambient air and humidity prior to formation of the connection to the bond pad, and to air, humidity and elevated temperatures near 200° C. during the process of forming the connection. This creates a significant problem because of the rapid formation of a tenacious nonconductive oxide on the surface of the metal, even at room temperature. The presence of these copper oxides generally prevents the formation of good wire bonds or solder ball connections to bare copper surfaces. Similarly, copper wire usually has a limited shelf life due to the formation of a thin layer of oxides on its surface even when stored under conditions of relatively low oxygen concentration and low humidity. This copper oxide layer will have an unacceptably negative impact on the conductivity of the connection.
In the case of copper metallization on semiconductors, one commonly used solution to this problem has been to deposit a thin layer of a more oxidation-resistant metal on the bond pad so as to protect it from oxidation. Typically, this second layer of metallization is formed from gold or aluminum, as disclosed in U.S. Pat. No. 5,785,236. This is typically accomplished by vapor deposition of a layer of the metal onto the semiconductor wafer using a mask. However, this proposed solution creates several of its own problems. For example, another set of lithography steps is then required to pattern, mask and etch the metal, and thereby form bond pads which can be wire bonded. Such additional wafer processing steps add significantly to the cost of the devices. Furthermore, when aluminum or gold is bonded to the copper, thin intermediate barrier layers of other metals are usually required to prevent the interdiffusion of the copper into the gold or aluminum or vise versa.
For example, U.S. Pat. No. 4,987,750 describes the use of titanium nitride (TiN), tungsten (W), tungsten nitride (WN), zirconium nitride (ZrN), titanium carbide (TiC), tungsten carbide (WC), tantalum (Ta), tantalum nitride (TaN), or titanium tungsten (TiW) as barrier layers for copper. Many of these materials, however, also form nonconductive oxides, or have poor electrical or thermal conductivity, or a high thermal expansion.
Most recently, it has been proposed to utilize a frangible layer of a ceramic insulator, such as silicon oxide or silicon nitride, that have a thickness suitable for soldering without fluxing and that are sufficiently frangible during ball or wedge bonding to obtain metal to metal contact between the bonding surface and the wire to be bonded. Such a process is disclosed in U.S. Pat. No. 6,352,743, which is assigned to the assignee of the present invention. While this process has several advantages and desirable characteristics, it can be problematic if the process steps are not precisely controlled. For example, if the ceramic layer is not sufficiently frangible, a substantial drop in conductivity can result, potentially in certain cases even preventing the formation of a connection.
For copper lead frames, the tip of the leads to which bond are made are usually coated with an oxidation resistant metal, usually silver. These approaches have the obvious disadvantage of increasing the costs and complexity and time of the manufacturing process. For solder-ball bumping, a flux would be required to remove the oxide during the reflow process.
Accordingly, there continues to be a need for an interconnect structure that will simplify the formation of high conductivity bonding. A copper bond pad with a suppressed oxide growth layer having good electrical conductivity, good thermal conductivity, and low thermal expansion is also needed, as well as a simple process for forming such copper bond pads.
The present invention meets these needs and offers additional advantages as discussed in the following summary and description of preferred embodiments.